Copper CMP vs Tungsten CMP vs Oxide CMP: Full Comparison

Why Three Distinct CMP Types Exist

Chemical Mechanical Planarization is not a single process — it is a family of processes, each engineered from the ground up for a specific material combination and integration context. The three primary types — oxide CMP, tungsten CMP, and copper CMP — differ so fundamentally in chemistry, mechanics, and process control requirements that they are effectively separate disciplines that share the same basic equipment platform.

The reason these types differ so dramatically comes down to one factor: the material being removed. Oxide (SiO₂) is a hard, chemically stable ceramic. Tungsten is a hard, refractory metal. Copper is a soft, corrosion-prone noble metal. Each requires a completely different chemical approach to achieve a usable removal rate, selectivity, and surface finish. Understanding these differences is the foundation of effective CMP process development and consumable selection. For the broader CMP context, see the CMP Semiconductor Complete Guide.

Oxide CMP In Depth

Oxide CMP was the original CMP application — developed by IBM in the late 1980s to solve the fundamental problem of cumulative topography buildup in multi-level aluminum interconnect stacks. Today, its most demanding form is STI (Shallow Trench Isolation) CMP, which defines the electrical isolation geometry between every transistor on a chip.

The Chemistry of Oxide Removal

Silicon dioxide removal in CMP is fundamentally a chemical process assisted by mechanical abrasion. At alkaline pH (10–11), hydroxide ions (OH⁻) attack the Si–O–Si backbone of the oxide surface, forming silanol groups (Si–OH) at the surface. These silanol-terminated surface sites then react with the abrasive particle surface — in the case of ceria, through a direct Ce–O–Si chemical bonding mechanism — enabling material transfer from the wafer surface to the abrasive particle with far lower mechanical force than would be required for purely mechanical removal.

This chemical-tooth mechanism in ceria slurries explains why ceria achieves oxide removal rates 5–10× higher than silica at equivalent abrasive concentrations. It also explains ceria’s excellent intrinsic selectivity for oxide over nitride: the Ce–O–Si bond formation reaction is specific to the oxide surface chemistry and does not occur efficiently at the silicon nitride (Si₃N₄) stop layer, providing a natural selectivity ratio often exceeding 100:1.

Dishing and Erosion in STI CMP

The primary yield-critical defect modes in oxide and STI CMP are dishing and erosion. Dishing is the concave topography that develops at the centre of wide oxide fill regions as the polishing pad — being compliant — continues removing material from the recessed oxide surface after the surrounding nitride field has been reached. Dishing increases with feature width and is particularly severe in wide dummy fill regions that are not constrained by pattern density. Erosion is the thinning of the nitride field layer in regions of high-density oxide features, driven by the locally increased polishing contact in those regions. Both phenomena affect transistor isolation and increase leakage current.

Mitigating dishing requires harder pads (which span the recessed feature rather than conforming into it) and high oxide-to-nitride selectivity slurries (which self-terminate at the nitride stop). Mitigating erosion requires careful control of pattern density through design-for-CMP (DFCMP) guidelines and slurry formulations with reduced removal rate at the nitride stop layer.

Process Window: Oxide CMP

Oxide CMP has the widest process window of the three types — it is the most forgiving in terms of over-polish tolerance, since over-polishing oxide into the underlying stop layer produces a controlled erosion effect rather than a catastrophic integration failure. The primary process controls are: slurry ceria concentration (governs MRR), pH (governs selectivity), polishing downforce and platen speed (govern MRR and uniformity), and conditioning aggressiveness (governs rate stability). Endpoint is typically detected by optical interferometry or motor current inflection at the oxide-to-nitride transition.

Tungsten CMP In Depth

Tungsten CMP is used to remove excess CVD tungsten deposited to fill contact holes (connecting the transistor source/drain and gate to the first metal layer, M1) and via plugs between metal layers. It is a front-to-back transition step — bridging the FEOL transistor layer to the BEOL interconnect stack — and any failure at this step (tungsten residue, contact short, or excessive oxide loss) has a direct impact on transistor connectivity yield.

Tungsten Removal Mechanism

Tungsten is a hard, chemically noble metal (Mohs hardness ~7.5) that requires an oxidising chemistry to achieve practical polishing rates. The most widely used approach uses ferric nitrate (Fe(NO₃)₃) or hydrogen peroxide (H₂O₂) as the oxidising agent to convert the tungsten surface to a soft tungsten oxide (WO₃) layer, which is then mechanically removed by the abrasive. The overall reaction is:

Alumina abrasives are preferred for tungsten CMP because of their hardness (Mohs 9) relative to the tungsten oxide surface, providing efficient mechanical removal without requiring excessive downforce. Silica abrasives can also be used in combination with higher oxidiser concentrations, particularly when lower defect density is required.

The Selectivity Challenge

The most critical integration requirement in tungsten CMP is stopping precisely at the thin TiN liner layer (typically 10–20 nm thick) or at the underlying oxide without removing excessive amounts of either. The oxide loss budget in tungsten CMP is typically <20 nm — a tight tolerance given that tungsten overburden can be 200–400 nm thick and the required W:oxide selectivity must therefore be maintained at >15:1 throughout the polish.

Selectivity is controlled primarily by the oxidiser concentration and abrasive type. Higher Fe³⁺ concentrations increase W removal rate preferentially; reducing concentration shifts removal rate toward the oxide. Alumina abrasives are more aggressive on oxide than silica, so switching to silica at the second stage of tungsten CMP (after bulk W removal) can improve selectivity during the stop-layer approach phase.

Tungsten Stringer Defects

The most critical tungsten CMP defect is the “stringer” — a residual tungsten film in the field region between contacts, caused by insufficient polish time or local planarization failure at high-density contact arrays. A single stringer can short multiple adjacent contacts, causing direct circuit failure. This defect requires aggressive over-polish to eliminate, which in turn increases oxide loss — creating a direct trade-off between stringer yield and oxide budget that is one of the principal process window challenges in tungsten CMP module qualification.

Copper CMP In Depth

Copper CMP is the most chemically complex and integration-critical of the three primary CMP types. Introduced into production by IBM and Intel in the late 1990s with the transition from aluminum to copper interconnects, it has enabled every generation of high-performance chip since then. At 7 nm and below, copper CMP modules may involve 3–4 distinct polishing steps per metal layer.

The Dual-Damascene Integration Context

Copper cannot be dry-etched (unlike aluminum), so copper interconnects are formed by the dual-damascene process: trenches (for wires) and vias (for vertical connections) are etched into the dielectric, a barrier metal (TaN/Ta) and copper seed layer are deposited, copper is filled by electrochemical deposition (ECD), and CMP removes the excess copper and barrier metal from the field surface. The CMP process must remove hundreds of nanometers of copper overburden while leaving the copper in the trenches and vias precisely co-planar with the surrounding dielectric — a demanding planarization and uniformity requirement.

Three-Step Copper CMP Sequence

Advanced copper CMP modules use a three-step sequence:

• Step 1 — Bulk copper removal: High-rate copper slurry (MRR 4,000–7,000 Å/min) removes the bulk copper overburden down to near the barrier metal surface. Hard pad, high downforce (3–5 psi). Endpoint by optical interferometry detecting the barrier metal approach.
• Step 2 — Barrier metal removal: Lower-rate slurry removes the thin TaN/Ta barrier and remaining copper overburden, stopping on the low-k dielectric. Requires different slurry chemistry with selectivity between barrier, copper, and dielectric. Medium downforce (2–3 psi).
• Step 3 — Buff / surface finish: Very low downforce (<1 psi), soft pad, dilute or surfactant-only slurry to improve surface finish, reduce copper dishing, and remove residual surface damage from steps 1 and 2. Endpoint by timer or fixed removal amount.

Corrosion Control: The BTA System

The most distinctive feature of copper CMP slurry chemistry is the use of benzotriazole (BTA) — or related azole compounds — as a corrosion inhibitor. BTA forms a passivating monolayer on copper surfaces by coordinating with copper surface atoms, significantly reducing the electrochemical dissolution rate of copper in the acidic slurry environment. In recessed features (the inside of trenches), where the slurry’s mechanical abrasion is minimal, the BTA passivation prevents continued corrosive dissolution — providing the within-feature copper protection needed to control dishing. In raised areas, the mechanical action of the pad removes the BTA layer, exposing fresh copper surface to oxidation and maintaining the removal rate.

The BTA concentration must be carefully optimised: too little results in excessive corrosion and dishing; too much inhibits removal rate and can leave organic residues on the surface that are difficult to remove in post-CMP cleaning. For more on how these residues affect cleaning, see Post-CMP Cleaning: Methods, Challenges & Best Practices.

Master Comparison Table

Slurry Chemistry Compared

The slurry chemistry differences between the three CMP types are driven by the electrochemical properties of the target material. Understanding these differences explains why cross-contamination between CMP slurry types is never permissible and why different slurry delivery lines, storage systems, and waste streams are maintained for each.

For a comprehensive guide to slurry selection and formulation across all CMP applications, refer to our dedicated resource: CMP Slurry Guide: Types, Selection & Optimization.

Defect Modes by CMP Type

Each CMP type has a characteristic set of defect modes that arise from the specific interaction between its chemistry, the polished material, and the underlying device structure. Recognising these defect signatures is the first step in root-cause analysis. For the full defect engineering treatment, see CMP Defect Types, Root Causes & Yield Improvement.

Integration Sequence in the Fab

The three CMP types are not interchangeable — they occur at specific, well-defined points in the wafer fabrication flow, and their order reflects the physical structure of the integrated circuit being built.

• STI CMP occurs very early in the process flow — immediately after STI oxide deposition in the FEOL. It is typically the first CMP step a wafer encounters and sets the planarity baseline for all subsequent steps.
• Pre-metal dielectric (PMD) CMP occurs after gate stack formation and before contact hole etch, planarizing the BPSG or TEOS oxide layer above the gate.
• Tungsten CMP follows CVD tungsten deposition into contact holes and vias. It occurs at the MOL transition and at each via level in the BEOL stack.
• Copper CMP occurs at every metal layer in the BEOL dual-damascene interconnect stack — typically M1 through M10 or higher — making it the most frequently repeated CMP type in the entire process flow.
• ILD CMP (oxide) occurs between each copper metal layer to planarize the inter-level dielectric before the next via etch.

Beyond Copper & Tungsten: Cobalt and Ruthenium

As described in our article on CMP at Advanced Nodes, tungsten and copper are being supplemented — and in some applications replaced — by cobalt and ruthenium at 7 nm and below. These metals bring their own unique CMP chemistry challenges. Cobalt requires near-neutral pH (8–9) and careful corrosion inhibition; ruthenium is chemically inert in most conventional slurry chemistries and requires aggressive oxidative systems for practical removal rates.

In 2026, cobalt CMP is in volume production at multiple leading-edge fabs for M0/V0 local interconnects, while ruthenium CMP is in advanced process development for 2 nm and below applications. The consumables ecosystem for these new metals is still maturing, creating significant opportunities for slurry and pad suppliers — including JEEZ — who invest in application-specific formulation development for these emerging materials.