{"id":1920,"date":"2026-04-30T14:26:57","date_gmt":"2026-04-30T06:26:57","guid":{"rendered":"https:\/\/jeez-semicon.com\/?p=1920"},"modified":"2026-04-30T15:01:13","modified_gmt":"2026-04-30T07:01:13","slug":"cmp-polishing-pads-technologies-comparison","status":"publish","type":"post","link":"https:\/\/jeez-semicon.com\/ru\/blog\/cmp-polishing-pads-technologies-comparison\/","title":{"rendered":"CMP Polishing Pads: Technologies &amp; Comparison"},"content":{"rendered":"<!-- JEEZ | Cluster 2: CMP Polishing Pads: Technologies & Comparison -->\n<style>\n.jz*,.jz *::before,.jz *::after{box-sizing:border-box;margin:0;padding:0}\n.jz{font-family:'Segoe UI',Arial,sans-serif;font-size:16px;line-height:1.8;color:#1a1a2e;max-width:900px;margin:0 auto}\n.jz-hero{background:linear-gradient(135deg,#0f2544 0%,#1a4a8a 55%,#0e7c86 100%);border-radius:12px;padding:56px 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0}\n.jz-step{display:flex;gap:16px;margin-bottom:18px;align-items:flex-start}\n.jz-step-num{flex-shrink:0;width:34px;height:34px;background:linear-gradient(135deg,#1a4a8a,#0e7c86);color:#fff;font-size:.83em;font-weight:700;border-radius:50%;display:flex;align-items:center;justify-content:center}\n.jz-step-body p{margin-bottom:0;font-size:.94em}\n.jz-step-body strong{color:#0f2544}\n.jz-cta{background:linear-gradient(135deg,#0f2544 0%,#1a4a8a 60%,#0e7c86 100%);border-radius:12px;padding:44px 36px;text-align:center;margin:56px 0 36px;position:relative;overflow:hidden}\n.jz-cta::before{content:'';position:absolute;top:-40px;right:-40px;width:180px;height:180px;border-radius:50%;background:rgba(255,255,255,0.05)}\n.jz-cta h2{font-size:1.6em;color:#fff;border:none;margin:0 0 12px;position:relative;z-index:1}\n.jz-cta p{color:#c8dff0;margin-bottom:24px;position:relative;z-index:1}\n.jz-btn{display:inline-block;background:#fff;color:#0f2544;font-weight:700;font-size:.93em;padding:12px 30px;border-radius:50px;text-decoration:none;transition:all .25s;position:relative;z-index:1;box-shadow:0 4px 14px rgba(0,0,0,.18)}\n.jz-btn:hover{background:#a8d8ea;color:#0f2544;transform:translateY(-1px)}\n.jz-btn-sec{display:inline-block;background:rgba(255,255,255,0.12);color:#e8f4ff;font-weight:600;font-size:.88em;padding:10px 24px;border-radius:50px;text-decoration:none;transition:all .25s;position:relative;z-index:1;border:1px solid rgba(255,255,255,0.3);margin-left:12px}\n.jz-btn-sec:hover{background:rgba(255,255,255,0.22);color:#fff}\n.jz-tags{display:flex;flex-wrap:wrap;gap:7px;margin:20px 0}\n.jz-tag{background:#e8f2ff;color:#1a4a8a;font-size:.77em;font-weight:600;padding:4px 11px;border-radius:20px;border:1px solid #c0d8f5}\n.jz-divider{border:none;border-top:1px solid #e0ebff;margin:38px 0}\n.jz-pillar-link{display:inline-flex;align-items:center;gap:8px;background:#e8f2ff;border:1px solid #b8d5f5;border-radius:8px;padding:10px 18px;text-decoration:none;color:#1a4a8a;font-size:.9em;font-weight:600;margin:10px 0 24px;transition:all .2s}\n.jz-pillar-link:hover{background:#d0e8ff;border-color:#1a4a8a}\n<\/style>\n\n<div class=\"jz\">\n\n<div class=\"jz-hero\">\n  <div class=\"jz-hero-label\">JEEZ Technical Guide \u00b7 CMP Polishing Pads<\/div>\n  <p>A complete engineering reference covering hard, soft, stacked, and fixed-abrasive pad technologies \u2014 pad microstructure, groove design, break-in protocols, lifetime modeling, and how to select the right pad for your process.<\/p>\n  <div class=\"jz-hero-meta\">\n    <span>\ud83d\udcc5 Updated April 2026<\/span>\n    <span>\u23f1 Reading time: ~20 min<\/span>\n    <span>\u270d\ufe0f JEEZ Technical Editorial Team<\/span>\n  <\/div>\n<\/div>\n\n<a class=\"jz-pillar-link\" href=\"https:\/\/jeez-semicon.com\/ru\/blog\/What-Are-CMP-Materials-Complete-Guide\/\" target=\"_blank\" rel=\"noopener noreferrer\">\u2190 \u0412\u0435\u0440\u043d\u0443\u0442\u044c\u0441\u044f \u043a \u043c\u0430\u0442\u0435\u0440\u0438\u0430\u043b\u0430\u043c CMP: \u041f\u043e\u043b\u043d\u043e\u0435 \u0440\u0443\u043a\u043e\u0432\u043e\u0434\u0441\u0442\u0432\u043e<\/a>\n\n<nav class=\"jz-toc\" aria-label=\"\u041e\u0433\u043b\u0430\u0432\u043b\u0435\u043d\u0438\u0435\">\n  <div class=\"jz-toc-title\">\ud83d\udccb \u041e\u0433\u043b\u0430\u0432\u043b\u0435\u043d\u0438\u0435<\/div>\n  <ol>\n    <li><a href=\"#pad-intro\">Why Polishing Pads Matter in CMP<\/a><\/li>\n    <li><a href=\"#pad-structure\">Pad Microstructure: What&#8217;s Inside a CMP Pad<\/a><\/li>\n    <li><a href=\"#pad-types\">Pad Types: Hard, Soft, Stacked &amp; Fixed-Abrasive<\/a><\/li>\n    <li><a href=\"#groove-design\">Groove Pattern Engineering<\/a><\/li>\n    <li><a href=\"#pad-properties\">Key Physical Properties and Their Process Impact<\/a><\/li>\n    <li><a href=\"#pad-comparison\">Head-to-Head Comparison: Major Pad Families<\/a><\/li>\n    <li><a href=\"#break-in\">Pad Break-In Protocols<\/a><\/li>\n    <li><a href=\"#lifetime\">Pad Lifetime Modeling and Replacement Triggers<\/a><\/li>\n    <li><a href=\"#selection\">Pad Selection Guide by Application<\/a><\/li>\n    <li><a href=\"#cost\">Cost of Ownership Optimization<\/a><\/li>\n    <li><a href=\"#faq\">\u0427\u0410\u0421\u0422\u041e \u0417\u0410\u0414\u0410\u0412\u0410\u0415\u041c\u042b\u0415 \u0412\u041e\u041f\u0420\u041e\u0421\u042b<\/a><\/li>\n  <\/ol>\n<\/nav>\n\n<section id=\"pad-intro\">\n  <h2>1. Why Polishing Pads Matter in CMP<\/h2>\n  <p>The CMP polishing pad is the physical interface between the tool and the wafer. It is responsible for distributing the applied downforce across the wafer surface, transporting fresh slurry into the contact zone, and carrying spent slurry and reaction by-products away from the polishing interface. In doing so, the pad exerts a dominant influence over material removal rate, within-wafer uniformity, defect levels, and the cost structure of the CMP operation.<\/p>\n  <p>Despite its critical role, the polishing pad is often treated as a secondary variable in process development \u2014 receiving less attention than the slurry. This is a mistake. In practice, the pad and slurry form an inseparable system: the same slurry can produce dramatically different performance profiles when used with different pad types, groove patterns, or conditioning programs. Understanding pad technology in depth is essential for any engineer tasked with optimizing or troubleshooting a CMP process.<\/p>\n  <div class=\"jz-stats\">\n    <div class=\"jz-stat\"><div class=\"n\">25\u201335%<\/div><div class=\"l\">Fraction of total CMP consumable cost attributable to polishing pads<\/div><\/div>\n    <div class=\"jz-stat\"><div class=\"n\">500\u20132,000<\/div><div class=\"l\">Typical wafer pass lifetime of a hard CMP pad in oxide applications<\/div><\/div>\n    <div class=\"jz-stat\"><div class=\"n\">~60 \u00b5m<\/div><div class=\"l\">Typical pad surface asperity height after conditioning (fresh pad)<\/div><\/div>\n    <div class=\"jz-stat\"><div class=\"n\">\u00b11\u20132%<\/div><div class=\"l\">Best-in-class WIWNU achievable with optimized pad + conditioning system<\/div><\/div>\n  <\/div>\n<\/section>\n\n<hr class=\"jz-divider\"\/>\n\n<section id=\"pad-structure\">\n  <h2>2. Pad Microstructure: What&#8217;s Inside a CMP Pad<\/h2>\n  <p>The vast majority of commercial CMP pads are fabricated from <strong>polyurethane<\/strong>, a polymer selected for its chemical resistance, tuneable mechanical properties, and the controllability of its pore structure during manufacturing. Understanding the three-dimensional microstructure of a polyurethane CMP pad explains why its properties evolve during use and why conditioning is necessary to maintain process stability.<\/p>\n\n  <h3>Closed-Cell Foam Pads (Hard Pads)<\/h3>\n  <p>Hard CMP pads are produced by a cast polyurethane process in which a blowing agent or hollow microspheres (typically PTFE or glass) are incorporated into the polymer matrix during cure. The result is a closed-cell foam structure with pores of 20\u201380 \u00b5m diameter distributed throughout the pad thickness. These pores serve two functions: they reduce the effective elastic modulus of the pad (making it slightly more compliant than solid polyurethane) and they act as micro-reservoirs that hold slurry within the contact zone.<\/p>\n  <p>The surface of the pad as manufactured is relatively smooth \u2014 the pores are subsurface. Pad conditioning by a diamond disc opens the pore structure at the surface, creating the micro-textured asperity landscape that is essential for effective polishing. This is why pad conditioning is a prerequisite for stable polishing performance, and why pad break-in is required before a new pad reaches its steady-state MRR.<\/p>\n\n  <h3>Open-Cell and Felt-Based Pads (Soft Pads)<\/h3>\n  <p>Soft polishing pads use either a non-woven felt base impregnated with polyurethane, or an open-cell foam structure. These materials have significantly lower Shore hardness than hard pads and much higher porosity (often 50\u201370%). Their open pore structure provides excellent slurry absorption and retention, and their low modulus allows them to conform closely to the local wafer topography \u2014 the property that gives them their low-defect, low-scratch performance advantage.<\/p>\n\n  <div class=\"jz-warn\">\n    <div class=\"jz-warn-icon\">\ud83d\udca1<\/div>\n    <div class=\"jz-warn-body\">\n      <strong>Key insight:<\/strong> Hard pads remove material from the highest topographic points first because their stiffness concentrates the contact pressure at elevated regions. Soft pads distribute contact pressure more evenly \u2014 which minimizes scratching but also reduces planarity efficiency. This is why hard pads are used for step-height reduction and soft pads for final defect cleanup.\n    <\/div>\n  <\/div>\n<\/section>\n\n<hr class=\"jz-divider\"\/>\n\n<section id=\"pad-types\">\n  <h2>3. Pad Types: Hard, Soft, Stacked &amp; Fixed-Abrasive<\/h2>\n\n  <div class=\"jz-grid2\">\n    <div class=\"jz-card\">\n      <h4>Hard Pads (IC1000-type)<\/h4>\n      <ul>\n        <li>Cast polyurethane with closed-cell microsphere structure<\/li>\n        <li>Shore D hardness: 50\u201365; Young&#8217;s modulus: 100\u2013400 MPa<\/li>\n        <li>Excellent planarization efficiency for high step-height features<\/li>\n        <li>Standard for oxide, W, and first-step copper CMP<\/li>\n        <li>Requires frequent diamond conditioning to maintain MRR<\/li>\n        <li>Higher wear rate than soft pads<\/li>\n      <\/ul>\n    <\/div>\n    <div class=\"jz-card\">\n      <h4>Soft Pads (Politex \/ felt-type)<\/h4>\n      <ul>\n        <li>Non-woven polyester\/polyurethane felt or open-cell foam<\/li>\n        <li>Shore A hardness: 15\u201330; very low modulus<\/li>\n        <li>Excellent defect performance and scratch count reduction<\/li>\n        <li>Used as second\/buff step in Cu CMP and oxide touch-up<\/li>\n        <li>Minimal conditioning required; self-renewing surface texture<\/li>\n        <li>Limited planarization efficiency for large topographic steps<\/li>\n      <\/ul>\n    <\/div>\n    <div class=\"jz-card\">\n      <h4>Stacked \/ Composite Pads<\/h4>\n      <ul>\n        <li>Hard polyurethane top pad laminated to a compressible sub-pad<\/li>\n        <li>Sub-pad materials: Suba IV (felt), polyethylene foam, or EVA foam<\/li>\n        <li>Sub-pad compressibility compensates for wafer bow and chuck non-flatness<\/li>\n        <li>Combines planarization efficiency of hard pad with edge uniformity benefits<\/li>\n        <li>Most common configuration in high-volume 300 mm manufacturing<\/li>\n        <li>Sub-pad must be replaced with the top pad to maintain system performance<\/li>\n      <\/ul>\n    <\/div>\n    <div class=\"jz-card\">\n      <h4>Fixed-Abrasive Pads (FAP)<\/h4>\n      <ul>\n        <li>Abrasive particles (CeO\u2082, SiO\u2082, Al\u2082O\u2083) embedded in polyurethane matrix<\/li>\n        <li>No separate liquid slurry required \u2014 uses DI water or dilute chemical rinse<\/li>\n        <li>Exceptional uniformity and low defect density for optical-grade applications<\/li>\n        <li>Used in sapphire, SiC substrate polish, and STI endpoint sharpening<\/li>\n        <li>Higher consumable cost; limited commercial availability vs. conventional pads<\/li>\n        <li>Growing interest for hybrid bonding surface preparation<\/li>\n      <\/ul>\n    <\/div>\n  <\/div>\n<\/section>\n\n<hr class=\"jz-divider\"\/>\n\n<section id=\"groove-design\">\n  <h2>4. Groove Pattern Engineering<\/h2>\n  <p>The macro-scale groove pattern machined or embossed into the pad surface has a major influence on slurry transport, lateral pressure uniformity, and wafer-edge performance. Groove design is one of the most underappreciated variables in CMP pad selection, yet it can produce WIWNU differences of 1\u20133% across the wafer when changed while holding all other parameters constant.<\/p>\n\n  <div class=\"jz-table-wrap\">\n    <table class=\"jz-table\">\n      <thead>\n        <tr><th>Groove Pattern<\/th><th>\u041e\u043f\u0438\u0441\u0430\u043d\u0438\u0435<\/th><th>Slurry Transport<\/th><th>Best For<\/th><th>Limitation<\/th><\/tr>\n      <\/thead>\n      <tbody>\n        <tr><td><strong>Concentric rings (K-grooves)<\/strong><\/td><td>Concentric circular grooves at regular pitch<\/td><td>Good radial distribution; centrifugal slurry flow<\/td><td>Oxide CMP; general-purpose<\/td><td>Non-uniform at wafer edge near groove junctions<\/td><\/tr>\n        <tr><td><strong>X-Y grid<\/strong><\/td><td>Orthogonal cross-hatch of linear grooves<\/td><td>Excellent lateral and radial coverage<\/td><td>Cu CMP, barrier CMP<\/td><td>Higher slurry consumption vs. concentric<\/td><\/tr>\n        <tr><td><strong>Spiral<\/strong><\/td><td>Single continuous spiral groove from center to edge<\/td><td>Smooth, continuous slurry flow without dead zones<\/td><td>Low-defect applications<\/td><td>Directional flow can cause asymmetric WIWNU<\/td><\/tr>\n        <tr><td><strong>Perforated \/ through-holes<\/strong><\/td><td>Array of circular through-holes in pad; used with groove overlay<\/td><td>Enables ISRM optical endpoint through pad<\/td><td>In-situ endpoint detection<\/td><td>Mechanical stress concentration around holes<\/td><\/tr>\n        <tr><td><strong>Tile \/ segmented<\/strong><\/td><td>Pad surface divided into discrete polishing zones with channels between<\/td><td>Independent slurry zones reduce cross-wafer contamination<\/td><td>Ultra-low-k, 3D-IC bonding<\/td><td>Complex manufacturing; higher cost<\/td><\/tr>\n      <\/tbody>\n    <\/table>\n  <\/div>\n\n  <p>Groove width (typically 0.25\u20130.75 mm), groove depth (0.3\u20130.8 mm), and groove pitch (1\u20133 mm) all interact with platen rotation speed and slurry flow rate to determine the effective slurry film thickness under the wafer. Optimization of these parameters is typically done empirically using blanket wafer MRR mapping experiments combined with computational fluid dynamics (CFD) modeling at the pad supplier&#8217;s application engineering center.<\/p>\n<\/section>\n\n<hr class=\"jz-divider\"\/>\n\n<section id=\"pad-properties\">\n  <h2>5. Key Physical Properties and Their Process Impact<\/h2>\n  <p>Selecting a CMP pad requires understanding the relationship between measurable physical properties and on-tool process performance. The following properties are the most diagnostically useful for pad characterization and comparison:<\/p>\n\n  <div class=\"jz-table-wrap\">\n    <table class=\"jz-table\">\n      <thead>\n        <tr><th>\u041d\u0435\u0434\u0432\u0438\u0436\u0438\u043c\u043e\u0441\u0442\u044c<\/th><th>Measurement Method<\/th><th>\u0422\u0438\u043f\u0438\u0447\u043d\u044b\u0439 \u0434\u0438\u0430\u043f\u0430\u0437\u043e\u043d<\/th><th>Process Significance<\/th><\/tr>\n      <\/thead>\n      <tbody>\n        <tr><td><strong>Shore D Hardness<\/strong><\/td><td>Shore D durometer (ASTM D2240)<\/td><td>40\u201365 (hard); 15\u201330 (soft)<\/td><td>Higher hardness = more planarization; lower hardness = lower defects and better edge uniformity<\/td><\/tr>\n        <tr><td><strong>Compressibility (%)<\/strong><\/td><td>Thickness under load \/ unloaded thickness (ASTM D1056)<\/td><td>0.5\u20135%<\/td><td>Higher compressibility allows sub-pad to compensate for wafer bow; affects WIWNU at wafer edge<\/td><\/tr>\n        <tr><td><strong>Storage Modulus E&#8217; (MPa)<\/strong><\/td><td>Dynamic Mechanical Analysis (DMA)<\/td><td>50\u2013500 MPa<\/td><td>Frequency-dependent; determines pad response at high platen RPM; affects hydrodynamic film thickness<\/td><\/tr>\n        <tr><td><strong>Porosity (%)<\/strong><\/td><td>Mercury porosimetry; SEM image analysis<\/td><td>20\u201360%<\/td><td>Higher porosity = more slurry retention; excessive porosity reduces mechanical stability and MRR consistency<\/td><\/tr>\n        <tr><td><strong>Mean Pore Diameter (\u00b5m)<\/strong><\/td><td>Bubble-point or SEM cross-section<\/td><td>20\u201380 \u00b5m<\/td><td>Larger pores = more slurry volume per contact area; affects abrasive particle trapping and scratch risk<\/td><\/tr>\n        <tr><td><strong>Pad Thickness (mm)<\/strong><\/td><td>Contact profilometry<\/td><td>1.2\u20133.0 mm (total pad stack)<\/td><td>Thicker pad allows more conditioning before replacement; affects sub-pad compressibility budget<\/td><\/tr>\n        <tr><td><strong>Surface Roughness Ra (\u00b5m)<\/strong><\/td><td>White-light interferometry or contact stylus<\/td><td>1\u201315 \u00b5m (conditioned)<\/td><td>Higher Ra = more asperity contact area = higher initial MRR; must be maintained by conditioning throughout pad life<\/td><\/tr>\n      <\/tbody>\n    <\/table>\n  <\/div>\n\n  <div class=\"jz-fact\">\n    <strong>Engineering note:<\/strong> The viscoelastic storage modulus E&#8217; is a more accurate predictor of pad polishing behavior than Shore hardness alone, because it captures the frequency-dependent stiffness that governs contact mechanics at the high relative velocities (1\u20133 m\/s) typical of CMP. Two pads with identical Shore D values but different E&#8217; frequency profiles can produce significantly different WIWNU and planarity results.\n  <\/div>\n<\/section>\n\n<hr class=\"jz-divider\"\/>\n\n<section id=\"pad-comparison\">\n  <h2>6. Head-to-Head Comparison: Major Pad Families<\/h2>\n  <div class=\"jz-table-wrap\">\n    <table class=\"jz-table\">\n      <thead>\n        <tr><th>Criterion<\/th><th>Hard Pad (IC1000-type)<\/th><th>Soft Pad (Politex-type)<\/th><th>Stacked Pad<\/th><th>Fixed-Abrasive Pad<\/th><\/tr>\n      <\/thead>\n      <tbody>\n        <tr><td><strong>Planarization efficiency<\/strong><\/td><td>\u2b50\u2b50\u2b50\u2b50\u2b50 Excellent<\/td><td>\u2b50\u2b50 Poor<\/td><td>\u2b50\u2b50\u2b50\u2b50 Very good<\/td><td>\u2b50\u2b50\u2b50 Good<\/td><\/tr>\n        <tr><td><strong>Defect \/ scratch level<\/strong><\/td><td>\u2b50\u2b50\u2b50 Moderate<\/td><td>\u2b50\u2b50\u2b50\u2b50\u2b50 Excellent<\/td><td>\u2b50\u2b50\u2b50\u2b50 Good<\/td><td>\u2b50\u2b50\u2b50\u2b50\u2b50 Excellent<\/td><\/tr>\n        <tr><td><strong>WIWNU (edge)<\/strong><\/td><td>\u2b50\u2b50\u2b50 Moderate<\/td><td>\u2b50\u2b50\u2b50\u2b50 Good<\/td><td>\u2b50\u2b50\u2b50\u2b50\u2b50 Best<\/td><td>\u2b50\u2b50\u2b50\u2b50 Good<\/td><\/tr>\n        <tr><td><strong>MRR stability<\/strong><\/td><td>\u2b50\u2b50\u2b50\u2b50 Good (with conditioning)<\/td><td>\u2b50\u2b50\u2b50\u2b50\u2b50 Excellent<\/td><td>\u2b50\u2b50\u2b50\u2b50 Good<\/td><td>\u2b50\u2b50\u2b50 Moderate<\/td><\/tr>\n        <tr><td><strong>Conditioning requirement<\/strong><\/td><td>High \u2014 frequent conditioning mandatory<\/td><td>Low \u2014 self-renewing texture<\/td><td>High (top pad)<\/td><td>\u041c\u0438\u043d\u0438\u043c\u0443\u043c<\/td><\/tr>\n        <tr><td><strong>Pad lifetime<\/strong><\/td><td>500\u20132,000 wafer passes<\/td><td>800\u20133,000 wafer passes<\/td><td>500\u20131,500 wafer passes<\/td><td>300\u2013800 wafer passes<\/td><\/tr>\n        <tr><td><strong>\u041e\u0442\u043d\u043e\u0441\u0438\u0442\u0435\u043b\u044c\u043d\u0430\u044f \u0441\u0442\u043e\u0438\u043c\u043e\u0441\u0442\u044c<\/strong><\/td><td>\u0421\u0440\u0435\u0434\u043d\u0438\u0439<\/td><td>Low\u2013medium<\/td><td>Medium\u2013high<\/td><td>\u0412\u044b\u0441\u043e\u043a\u0438\u0439<\/td><\/tr>\n        <tr><td><strong>Primary applications<\/strong><\/td><td>Oxide STI, W, ILD<\/td><td>Cu buff, oxide finish<\/td><td>Advanced Cu, barrier, BEOL<\/td><td>Sapphire, SiC, bonding prep<\/td><\/tr>\n      <\/tbody>\n    <\/table>\n  <\/div>\n<\/section>\n\n<hr class=\"jz-divider\"\/>\n\n<section id=\"break-in\">\n  <h2>7. Pad Break-In Protocols<\/h2>\n  <p>A new CMP pad does not deliver its nominal performance from the first wafer. The pad surface as received from the manufacturer has a relatively smooth, closed microstructure that has not yet been opened by diamond conditioning. Before the pad reaches its steady-state MRR and uniformity, it must go through a structured <em>break-in<\/em> procedure that progressively opens the pad surface and stabilizes the conditioning response.<\/p>\n\n  <div class=\"jz-steps\">\n    <div class=\"jz-step\">\n      <div class=\"jz-step-num\">1<\/div>\n      <div class=\"jz-step-body\"><p><strong>Dry conditioning:<\/strong> Run the diamond conditioner on the dry pad for 5\u201315 minutes with DI water rinse to begin opening the surface pore structure and removing any pad manufacturing release agents. Do not process wafers during this step.<\/p><\/div>\n    <\/div>\n    <div class=\"jz-step\">\n      <div class=\"jz-step-num\">2<\/div>\n      <div class=\"jz-step-body\"><p><strong>Wet conditioning with slurry flow:<\/strong> Begin flowing slurry at the production flow rate while continuing conditioning. Run for 15\u201330 minutes. Monitor the platen torque current as a proxy for friction state \u2014 it should rise and then stabilize as the pad surface texture reaches steady state.<\/p><\/div>\n    <\/div>\n    <div class=\"jz-step\">\n      <div class=\"jz-step-num\">3<\/div>\n      <div class=\"jz-step-body\"><p><strong>Dummy wafer pass:<\/strong> Polish 5\u201320 dummy (non-product) wafers using production process conditions. Measure MRR on each wafer and plot versus wafer number. The MRR should rise from an initial low value and stabilize within the target range by wafer 10\u201320 depending on pad type and application.<\/p><\/div>\n    <\/div>\n    <div class=\"jz-step\">\n      <div class=\"jz-step-num\">4<\/div>\n      <div class=\"jz-step-body\"><p><strong>MRR qualification:<\/strong> Once MRR has stabilized and passed the \u00b15% specification band for three consecutive wafers, the pad is qualified for product use. Document the break-in lot number, wafer count, and MRR trajectory for traceability.<\/p><\/div>\n    <\/div>\n    <div class=\"jz-step\">\n      <div class=\"jz-step-num\">5<\/div>\n      <div class=\"jz-step-body\"><p><strong>WIWNU verification:<\/strong> Measure within-wafer uniformity on a reference blanket wafer after pad qualification. Confirm that 1\u03c3 WIWNU meets the process specification before releasing the pad for full production use.<\/p><\/div>\n    <\/div>\n  <\/div>\n\n  <p>Break-in protocol duration and dummy wafer count vary by pad type: hard IC1000-type pads typically require 10\u201320 dummy wafers; softer pads may stabilize in fewer. Always follow the pad supplier&#8217;s recommended break-in procedure for the specific product, as formulation changes between pad generations can alter break-in behavior significantly. For a detailed treatment of the conditioning process and its relationship to pad performance, see our guide on <a href=\"https:\/\/jeez-semicon.com\/ru\/blog\/CMP-Pad-Conditioners-Conditioning-Process\/\" target=\"_blank\" rel=\"noopener noreferrer\">\u041a\u043e\u043d\u0434\u0438\u0446\u0438\u043e\u043d\u0435\u0440\u044b CMP Pad \u0438 \u043f\u0440\u043e\u0446\u0435\u0441\u0441 \u043a\u043e\u043d\u0434\u0438\u0446\u0438\u043e\u043d\u0438\u0440\u043e\u0432\u0430\u043d\u0438\u044f<\/a>.<\/p>\n<\/section>\n\n<hr class=\"jz-divider\"\/>\n\n<section id=\"lifetime\">\n  <h2>8. Pad Lifetime Modeling and Replacement Triggers<\/h2>\n  <p>Pad lifetime is not a fixed number \u2014 it is a function of the conditioning program, the downforce and velocity used in polishing, the slurry chemistry aggressiveness, and the specific pad formulation. Effective lifetime management requires defining measurable replacement triggers and monitoring them continuously across the pad&#8217;s useful life.<\/p>\n\n  <h3>Primary Pad Replacement Triggers<\/h3>\n  <ul>\n    <li><strong>MRR drift beyond specification (most common trigger):<\/strong> When the pad-normalized MRR on a reference blanket wafer falls below 90% of the initial qualified value, the pad is flagged for replacement. This criterion is objective, measurable, and directly linked to process performance.<\/li>\n    <li><strong>WIWNU degradation:<\/strong> As the pad surface texture becomes non-uniform through uneven conditioning or localized wear, within-wafer uniformity degrades \u2014 typically at the wafer edge first. An increase in 1\u03c3 WIWNU beyond the specification limit triggers pad replacement independent of MRR status.<\/li>\n    <li><strong>Pad thickness below minimum:<\/strong> Each conditioning cycle removes a small amount of pad material. When the remaining pad thickness drops below ~0.8 mm (or the supplier&#8217;s minimum for that product), structural integrity and sub-pad support behavior change significantly. Thickness is monitored using a non-contact eddy-current or ultrasonic gauge.<\/li>\n    <li><strong>Defect event (scratch spike):<\/strong> A sudden increase in scratch or particle defect count \u2014 detected by in-line inspection \u2014 may indicate pad surface delamination, groove edge cracking, or conditioner diamond shedding onto the pad surface. This triggers immediate pad inspection and typically replacement.<\/li>\n    <li><strong>Elapsed time \/ wafer count limit:<\/strong> Many fabs implement a preventive replacement schedule based on wafer count (e.g., every 1,000 wafer passes) as a risk management measure, regardless of whether performance metrics have been breached.<\/li>\n  <\/ul>\n\n  <div class=\"jz-hl\">\n    <p><strong>Cost of ownership insight:<\/strong> Extending pad lifetime by 20% through optimized conditioning frequency and downforce reduces pad cost per wafer by the same fraction. However, attempting to extend lifetime beyond the natural performance cliff \u2014 where MRR and WIWNU degrade rapidly \u2014 risks product yield loss that far exceeds the pad cost savings. The optimal replacement point is typically 5\u201310% before the specification limit is reached, providing a buffer against wafer-to-wafer variability.<\/p>\n  <\/div>\n<\/section>\n\n<hr class=\"jz-divider\"\/>\n\n<section id=\"selection\">\n  <h2>9. Pad Selection Guide by Application<\/h2>\n  <div class=\"jz-table-wrap\">\n    <table class=\"jz-table\">\n      <thead>\n        <tr><th>\u041f\u0440\u0438\u043b\u043e\u0436\u0435\u043d\u0438\u0435<\/th><th>Recommended Pad Type<\/th><th>Groove Pattern<\/th><th>Sub-pad Needed?<\/th><th>Key Selection Criterion<\/th><\/tr>\n      <\/thead>\n      <tbody>\n        <tr><td>STI oxide CMP<\/td><td>Hard (IC1000-type) or equivalent<\/td><td>Concentric or X-Y grid<\/td><td>Yes \u2014 compressible<\/td><td>Maximum planarization efficiency; SiO\u2082:SiN uniformity<\/td><\/tr>\n        <tr><td>ILD planarization<\/td><td>Hard or medium-hard<\/td><td>Concentric or spiral<\/td><td>Yes<\/td><td>Consistent MRR across density variations<\/td><\/tr>\n        <tr><td>Copper bulk (Step 1)<\/td><td>Hard or stacked composite<\/td><td>X-Y grid<\/td><td>Yes<\/td><td>High Cu MRR with sharp barrier stop<\/td><\/tr>\n        <tr><td>Copper barrier (Step 2)<\/td><td>Soft or medium-hard<\/td><td>X-Y grid or spiral<\/td><td>Yes<\/td><td>Low dishing and erosion; controlled Ta\/TaN MRR<\/td><\/tr>\n        <tr><td>Copper buff (Step 3)<\/td><td>Soft (Politex-type)<\/td><td>None or micro-perforated<\/td><td>\u0414\u043e\u043f\u043e\u043b\u043d\u0438\u0442\u0435\u043b\u044c\u043d\u043e<\/td><td>Minimum scratch count; surface roughness &lt;0.5 nm Ra<\/td><\/tr>\n        <tr><td>Tungsten via<\/td><td>Hard (IC1000 or equivalent)<\/td><td>Concentric or X-Y<\/td><td>Yes<\/td><td>W removal rate stability; TiN stop selectivity<\/td><\/tr>\n        <tr><td>Cobalt contact<\/td><td>Medium-hard or stacked<\/td><td>X-Y grid<\/td><td>Yes<\/td><td>Co:dielectric selectivity; corrosion-resistant material compatibility<\/td><\/tr>\n        <tr><td>Hybrid bonding prep<\/td><td>Fixed-abrasive or ultra-soft<\/td><td>\u041d\u0435\u0442<\/td><td>No<\/td><td>Sub-0.3 nm Ra; zero scratch; particle-free surface<\/td><\/tr>\n      <\/tbody>\n    <\/table>\n  <\/div>\n<\/section>\n\n<hr class=\"jz-divider\"\/>\n\n<section id=\"cost\">\n  <h2>10. Cost of Ownership Optimization<\/h2>\n  <p>Polishing pad cost is the second-largest consumable line item in the CMP budget after slurry. Optimizing pad cost of ownership requires looking beyond unit price to the full system cost per wafer pass \u2014 which includes pad lifetime, conditioning consumable wear, throughput impact, and yield risk from pad-related defect events.<\/p>\n\n  <h3>The Key Levers for Pad COO Reduction<\/h3>\n  <ul>\n    <li><strong>Maximize pad lifetime through conditioning optimization:<\/strong> Conditioning too aggressively wears the pad faster than necessary. Reducing conditioner downforce by 20\u201330% while maintaining MRR stability (confirmed by reference wafer measurement) can extend pad life significantly without process penalty.<\/li>\n    <li><strong>Match pad hardness to actual step-height requirement:<\/strong> Using a harder-than-necessary pad for a low-topography application increases both pad wear rate and conditioning frequency without benefit. Matching pad hardness to the actual planarization requirement is the most straightforward way to extend pad life.<\/li>\n    <li><strong>Implement in-situ MRR monitoring:<\/strong> Real-time friction current monitoring or optical reflectance endpoint detection allows precise identification of the MRR transition point, preventing both under-polish (yield loss) and over-polish (dishing + pad wear). Tight endpoint control reduces mean over-polish time and therefore mean pad wear per wafer.<\/li>\n    <li><strong>Use pad health metrics for predictive replacement:<\/strong> Rather than replacing pads on a fixed schedule, implementing reference wafer MRR measurement at defined intervals allows pads to remain in service until they actually approach their performance limits. This statistical approach can extend average pad lifetime by 15\u201325% over fixed-schedule replacement.<\/li>\n  <\/ul>\n\n  <p>JEEZ application engineers can conduct a detailed cost-of-ownership analysis for your specific CMP tool fleet and production volume. Our pad products are designed with pad lifetime and conditioning compatibility as primary engineering objectives \u2014 not just initial MRR. <a href=\"https:\/\/jeez-semicon.com\/ru\/contact\/\" target=\"_blank\" rel=\"noopener noreferrer\">Contact us to discuss a pad evaluation program.<\/a><\/p>\n<\/section>\n\n<hr class=\"jz-divider\"\/>\n\n<section id=\"faq\">\n  <h2>11. \u0412\u041e\u041f\u0420\u041e\u0421\u042b \u0418 \u041e\u0422\u0412\u0415\u0422\u042b<\/h2>\n\n  <h3>How often should I condition a CMP pad?<\/h3>\n  <p>Conditioning frequency depends on pad type, application, and the MRR stability requirement. For hard pads in oxide CMP, in-situ conditioning running concurrently with every wafer pass is standard. For softer pads in Cu buff applications, ex-situ conditioning between runs (or after every 5\u201310 wafers) is typically sufficient. The right frequency is determined empirically by measuring MRR stability as a function of wafers-between-conditioning cycles \u2014 the goal is the minimum conditioning frequency that maintains MRR within \u00b15% of target.<\/p>\n\n  <h3>What causes CMP pad glazing, and how do I detect it?<\/h3>\n  <p>Pad glazing occurs when the surface asperities are progressively smoothed by the polishing process, reducing the real contact area between pad and wafer. The primary indicator is a progressive MRR decline over a polishing run \u2014 typically 10\u201330% from beginning to end of pad life if not managed by conditioning. Glazing can also be detected visually (a shiny, reflective pad surface) or by surface profilometry showing reduced asperity height. Proper in-situ conditioning prevents glazing from accumulating to performance-limiting levels.<\/p>\n\n  <h3>Can I use the same pad for both Cu Step 1 and Step 2?<\/h3>\n  <p>In principle, a single pad type can cover both steps, but it is rarely optimal. Step 1 benefits from a harder, more aggressive pad to maximize Cu bulk removal rate, while Step 2 requires a softer, more selective pad to minimize dishing and erosion during barrier clearing. Using a hard pad for Step 2 risks excessive oxide erosion; using a soft pad for Step 1 reduces throughput. Most advanced logic fabs use a dedicated pad type for each step, typically on separate platens of a multi-platen CMP tool.<\/p>\n\n  <h3>How does pad groove pattern affect slurry utilization efficiency?<\/h3>\n  <p>Groove patterns strongly influence how efficiently slurry is transported across the pad-wafer interface. X-Y cross-hatch patterns typically provide the most uniform lateral and radial slurry coverage and are favored for copper CMP where uniform slurry chemistry across the wafer is critical. Concentric groove patterns rely on centrifugal force for radial distribution and can develop slurry depletion zones at specific radii under certain flow conditions. Groove pitch and depth must be matched to the slurry flow rate: too coarse a groove at low flow rates leads to slurry starvation in the contact zone.<\/p>\n<\/section>\n\n<hr class=\"jz-divider\"\/>\n\n<div class=\"jz-tags\">\n  <span class=\"jz-tag\">CMP Polishing Pads<\/span><span class=\"jz-tag\">IC1000 Pad<\/span><span class=\"jz-tag\">\u041a\u043e\u043d\u0434\u0438\u0446\u0438\u043e\u043d\u0438\u0440\u043e\u0432\u0430\u043d\u0438\u0435 \u043f\u043e\u0432\u0435\u0440\u0445\u043d\u043e\u0441\u0442\u0438<\/span>\n  <span class=\"jz-tag\">Polyurethane Pad<\/span><span class=\"jz-tag\">Fixed-Abrasive Pad<\/span><span class=\"jz-tag\">\u0420\u0430\u0441\u0445\u043e\u0434\u043d\u044b\u0435 \u043c\u0430\u0442\u0435\u0440\u0438\u0430\u043b\u044b \u0434\u043b\u044f CMP<\/span>\n  <span class=\"jz-tag\">\u041f\u043e\u043b\u0443\u043f\u0440\u043e\u0432\u043e\u0434\u043d\u0438\u043a\u043e\u0432\u044b\u0439 CMP<\/span><span class=\"jz-tag\">JEEZ<\/span>\n<\/div>\n\n<div class=\"jz-cta\">\n  <h2>Request a CMP Polishing Pad Sample<\/h2>\n  <p>JEEZ supplies hard, soft, and stacked CMP polishing pads for oxide, copper, tungsten, and advanced-node applications. Request a sample with full technical documentation and application engineering support.<\/p>\n  <a href=\"https:\/\/jeez-semicon.com\/ru\/contact\/\" target=\"_blank\" rel=\"noopener noreferrer\" class=\"jz-btn\">Request a Pad Sample<\/a>\n  <a href=\"https:\/\/jeez-semicon.com\/ru\/blog\/What-Are-CMP-Materials-Complete-Guide\/\" target=\"_blank\" rel=\"noopener noreferrer\" class=\"jz-btn-sec\">\u2190 \u041f\u043e\u043b\u043d\u043e\u0435 \u0440\u0443\u043a\u043e\u0432\u043e\u0434\u0441\u0442\u0432\u043e \u043f\u043e \u043c\u0430\u0442\u0435\u0440\u0438\u0430\u043b\u0430\u043c CMP<\/a>\n<\/div>\n\n<\/div>","protected":false},"excerpt":{"rendered":"<p>JEEZ Technical Guide \u00b7 CMP Polishing Pads A complete engineering reference covering hard, soft, stacked, and fixed-abrasive pad technologies \u2014 pad microstructure, groove design, break-in protocols, lifetime modeling, and how  &#8230;<\/p>","protected":false},"author":1,"featured_media":1951,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[9,59],"tags":[],"class_list":["post-1920","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-blog","category-industry"],"acf":[],"_links":{"self":[{"href":"https:\/\/jeez-semicon.com\/ru\/wp-json\/wp\/v2\/posts\/1920","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/jeez-semicon.com\/ru\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/jeez-semicon.com\/ru\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/jeez-semicon.com\/ru\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/jeez-semicon.com\/ru\/wp-json\/wp\/v2\/comments?post=1920"}],"version-history":[{"count":2,"href":"https:\/\/jeez-semicon.com\/ru\/wp-json\/wp\/v2\/posts\/1920\/revisions"}],"predecessor-version":[{"id":1922,"href":"https:\/\/jeez-semicon.com\/ru\/wp-json\/wp\/v2\/posts\/1920\/revisions\/1922"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/jeez-semicon.com\/ru\/wp-json\/wp\/v2\/media\/1951"}],"wp:attachment":[{"href":"https:\/\/jeez-semicon.com\/ru\/wp-json\/wp\/v2\/media?parent=1920"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/jeez-semicon.com\/ru\/wp-json\/wp\/v2\/categories?post=1920"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/jeez-semicon.com\/ru\/wp-json\/wp\/v2\/tags?post=1920"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}